1. Field of the Invention
The subject matter of the present invention pertains to an inverse assembler for translating the executable code output from an assembler of a data processing system into a corresponding set of assembly language mnemonics for debugging software associated with said executable code.
2. Description of the Prior Art
Logic State Analyzers typically perform the function of an inverse assembler. An inverse assembler is utilized to translate a set of executable code, generated by an assembler of a data processing system, into a corresponding set of assembly language mnemonics for the purpose of debugging a software package representing the executable code. For example, in FIG. 1a, during a software development process, the executable code is generated either from an assembler or a compiler, the assembler inputs a set of assembly language instructions from a user thereby generating the executable code. The executable code comprises a multitude of binary codes representing the assembly language instructions, the executable code being used by the target system (which may be, for example, a microprocessor). In FIG. 1b, a software analysis process is performed by the logic analyzer-inverse assembler wherein the executable code, utilized by the target system, is converted into a corresponding set of assembly language mnemonics. The corresponding set of assembly language mnemonics is analyzed for the purpose of debugging the set of assembly language instructions. If the target system, shown in FIG. 1a, executed the assembly language instructions properly (developing the results desired by the user), as determined by the corresponding set of assembly language mnemonics, the set of assembly language instructions (or a high level language corresponding to the assembly language instructions) have been written correctly.
As mentioned above, the assembler assembles the set of assembly language instructions input by the user to generate the executable code comprising a multitude of binary codes. The target system is typically (but not limited to) a microprocessor. The microprocessor executes the binary codes produced by the assembler. Execution of these binary codes may be monitored by a logic analyzer. In order to debug the code, it is necessary that the binary codes (executed by the microprocessor) be re-converted to the original set of assembly language instructions, that is, be inverse assembled into the corresponding set of assembly language mnemonics, for interpretation thereof by the user.
In order to inverse assemble the multitude of binary codes into the corresponding set of assembly language mnemonics, it is necessary to enter and store into memory information required to build a table, the table including two columns of information: the first column comprising a list of binary codes representing all of the possible binary codes capable of being generated by the microprocessor, the second column comprising a corresponding list of assembly language mnemonics (instructions) associated therewith.
For each of the binary codes, associated with the multitude of binary codes produced by the microprocessor, the process of inverse assembly was comprised of the following steps: locating the binary code as an address in the first column of said table stored in said memory, and identifying the corresponding assembly language mnemonic (instruction) in the second column thereof. Therefore, using said table, the multitude of binary codes produced by the microprocessor are inverse assembled into the corresponding set of assembly language mnemonics.
However, with respect to the inverse assemblers of the prior art, the task involving building said table was quite lengthy and tedious, if not impossible to accomplish. For most eight (8)-bit microprocessors, the first column of said table was comprised of a list of 2.sup.8 entries (that is, 256). This number of entries is reasonable. However, if a 16-bit microprocessor was utilized, the first column of said table was comprised of a list of 2.sup.16 (that is, 65,536) entries of binary code. A user must therefore enter 65,536 binary codes and the associated instructions to build said table. If such a table is built, the memory space required to store said table would be quite large. Consequently, the process of inverse assembly using the inverse assembler of the prior art (in particular, when associated with the 16-bit processor) proved to be impractical, if not impossible, to accomplish.
Alternatively, the inverse assembler of the prior art included a read-only-memory having firmware encoded therein which was responsible for debugging the set of assembly language instructions executed by said microprocessor. However, the read-only-memory was responsible for disassembling the assembly language instructions executed by only certain specific types of said microprocessors. If other ones of said microprocessors were utilized to execute said instructions, the firmware in the original read-only-memory could not disassemble (or inverse assemble) the instructions.
It was therefore necessary to remove the read-only-memory and replace it with a different read-only-memory having firmware disposed therein which could, accurately, disassemble the assembly language instructions. The need to remove the original read-only-memory and replace it with a new one, when a different microprocessor was utilized to execute the set of assembly language instructions, severely limited the scope of use associated with said inverse assembler of the prior art.